Source-synchronous communications systems are, for example, used in computer systems as source-synchronous data links to connect the memory to the processor. Details of such source-synchronous data links are e.g. specified in the JEDEC FB-DIMM standard.
In source synchronous communication systems a clock signal is sent over a clock channel along with a number of data signals over a data channel. Jitter in the transmitter that may be caused by a phase locked loop (PLL)-jitter or supply noise is observed in the timing of both the clock channel and the data channel. Source-synchronous communication systems benefit from the correlation between the clock channel and the data channel. This correlation is lost however if there is a difference in the travel time between clock and data. This difference is also denoted as propagation delay time difference.
This propagation delay time difference is mainly caused by different routing paths on the printed circuit boards. At certain frequencies, this may lead to the effect of jitter amplification. In other words, the timing between the data channel signal and the clock channel signal not only loses the correlation, but, even worse, at those certain frequencies the correlation may be negative.
One known solution is to introduce a PLL in the clock path at the receiver. This PLL filters out the high-frequency jitter of the clock channel signal. Hence, noise in the frequency band where negative correlation can appear, is cut off. However, also all correlation information above the PLL bandwidth is lost.
Another known solution is to delay the received clock signal by the actual clock-to-data skew by means of a high-precision delay line. This consumes a large amount of power and chip area and suffers from power supply noise.
It is an object of the invention to provide other solutions for source-synchronous communication systems.
It is a further object of the invention to provide an improved communication system comprising a transmitter and a receiver, wherein the transmitter and the receiver are coupled by means of a clock channel and a data channel. It is a further object of the invention to provide an improved receiver for such a communication system. It is a further object of the invention to provide an improved method for synchronizing a clock channel signal and a data channel signal of a source-synchronous communication channel.